Peripheral component interface express (PCIe) is a point-to-point electrical interface designed for CPU communication with peripheral components. As such, it is optimized for a type of communication in which one node (the CPU) is a control element and the other node is a controlled element. Because of this, PCIe conceptualizes “upstream” and “downstream” nodes, the CPU typically occupies the upstream function. PCIe communication paths are typically manifested by multiple transmit and receive signals as well as a number of auxiliary signals. These signals are physically sent over wire or fiber optic media. PCIe switch devices are used to provide interface fan-out such that one CPU can control multiple peripheral components.
As understood herein, PCIe might advantageously be used for very fast CPU-to-CPU communication but owing to inherent impediments arising from the upstream/downstream concept originally intended for a controlled node-controlling node environment, implementing PCIe in a CPU-to-CPU communication context poses non-trivial challenges. This is because each CPU in effect would be an “upstream” node and would attempt to send signals that would interfere with those of the other CPU.